SPICE Simulation · Auto-Schematic · AI Agent Verification
Run existing SPICE netlists (.cir, .sp) or readable .kess circuits. Get real Ngspice simulation, automatic connectivity-verified schematics, and hard PASS / FAIL requirement checks—in your browser or connected to your AI agent via MCP and the local CLI.
kess mcp) Real Ngspice simulation No account or cloud uploadFour-stage amplifier · 8 Ω load · output_power ≥ 1.8 W · gain ≈ 55 · device dissipation < 2 W
$ kess test agent-loop.kess --requirements stage.kessreq iteration 01 FAIL output_power = 997.7 mW (requires ≥ 1.80 W) agent action revises output stage load matching (16 Ω → 8 Ω) iteration 02 PASS output_power = 1.995 W · max_pd = 1.41 W
Three ways to use Kessetsu
Every interface runs the exact same Rust engineering core. Start visually in the browser, or install the single kess binary to get both the command-line tool and the Model Context Protocol (MCP) server.
Write .kess or import existing SPICE netlists directly in your browser. Inspect automatic schematics, explore interactive Bode and transient plots, and export engineering files immediately.
kessetsu.com/#editorOpen Web Hub kess mcp)Plug Kessetsu directly into Claude Code, Claude Desktop, Cursor, Windsurf, or VS Code. Instead of guessing shell flags, your AI calls native tools to compile, simulate, check .kessreq limits, and render schematics.
claude mcp add kessetsu -- kess mcpSet up MCP & CLI kess test)Run deterministic ERC checks, Ngspice simulations, parameter sweeps, and requirement verification from your terminal, scripts, or GitHub Actions pipelines with structured JSON output.
kess test amp.cir --requirements amp.kessreqCLI reference Closed-loop verification
An AI agent proposes and revises the circuit; Kessetsu enforces real electrical rules and Ngspice measurements at every step.
Pin acceptance criteria—gain, cutoff, power, ripple, or dissipation—in a separate requirement file the design cannot rewrite.
Work with standard SPICE netlists (.cir, .sp) or readable .kess source through kess mcp or the CLI.
ERC catches floating pins and shorted sources before Ngspice runs; structured PASS/FAIL assertions report exact measured values.
Render a connectivity-verified schematic (PNG/SVG) for human review and export to KiCad, LTspice, SPICE, or BOM CSV.
Kessetsu is AI-provider independent. Connect any agent via kess mcp or the versioned JSON CLI; see the agent workflow guide.
Zero-install browser workspace
Edit .kess or convert SPICE netlists, inspect a clean schematic, switch seamlessly between schematic and high-readability simulation plots, and export engineering artifacts without an account.
Work with analog circuits, reusable stages and local device models. Follow the circuit tutorial or bring an existing SPICE netlist.
Use parameter studies to compare component choices, loads, temperatures and tolerances. Keep failed cases alongside successful ones.
Bring measured CSV data into research comparison to inspect residuals against a simulation or reference dataset.
net GND net IN net OUT source VIN ac(1V) resistor R1 1k capacitor C1 159.154943nF connect VIN.minus to GND connect VIN.plus to IN connect R1.p1 to IN connect R1.p2 to OUT connect C1.p1 to OUT connect C1.p2 to GND simulate ac dec 40 10Hz 100kHz assert gain(V(OUT),V(IN)) > 0.99 assert cutoff(V(OUT),V(IN)) > 990Hz assert cutoff(V(OUT),V(IN)) < 1010Hz assert phase(V(OUT),V(IN),1kHz) > -46deg assert phase(V(OUT),V(IN),1kHz) < -44deg
Shared engineering core